During their fabrication process, ICs (integrated circuits) often incur defects due to minor imperfections in the process or in the semiconductor substrate. For that reason, IC devices are usually designed to contain redundant circuit elements, such as spare rows and columns of memory cells in semiconductor memory devices, e.g., a DRAM (dynamic random access memory), an SRAM (static random access memory), or an embedded memory. Such devices are also designed to include particular laser-severable links between electrical contacts of the redundant circuit elements. Such links can be removed, for example, to disconnect a defective memory cell and to substitute a replacement redundant cell. Similar techniques are also used to sever links in order to program or configure logic products, such as gate arrays or ASICs (application-specific integrated circuits). After an IC has been fabricated, its circuit elements are tested for defects, and the locations of defects may be recorded in a data file or defect map. Combined with positional information regarding the layout of the IC and the location of its circuit elements, a laser-based link processing system can be employed to remove selected links so as to make the IC useful.
A typical link processing system adjusts the position of the laser beam spot on a semiconductor wafer by moving the wafer in an XY plane underneath a stationary optics table, which supports a laser and other optical hardware. The wafer is moved underneath in the XY plane by placing it on a chuck that is carried by a motion stage. A typical wafer contains a number of dies, each containing an IC. Circuit elements within an IC are typically arranged in a regular geometric arrangement, as are the links between those elements. The links usually lie in regular rows in groups that are termed “link banks,” having an approximately uniform center-to-center pitch spacing. To remove selected links in a link bank, a laser beam spot (i.e., the position at which the laser beam's propagation path axis intersects the wafer workpiece) continuously advances along the link bank at an approximately uniform speed while the laser emits pulses to selectively remove links. The laser is triggered to emit a pulse and thereby to sever a link at a selected target position when the laser beam spot is on the target position. As a result, some of the links are not irradiated and left as unprocessed links, while others are irradiated to become severed. The process of progressing along a row of links and severing selected links with a laser pulse is termed a “link run.”
Two of the key parameters that impact the time spent processing a link run, and thus throughput, are the maximum velocity limit of the motion stage and the desired link run velocity. Desired link run velocity is the product of the laser pulse repetition frequency (“PRF”) and the link pitch. When the desired link run velocity exceeds the maximum velocity limit of the motion stage, a method must be practiced that results in a link run at a velocity that can be accommodated by the stage. Assume, for example, that the links in a link run have a pitch spacing of 4 μm (micrometers), that the motion stage 170 can travel at a maximum speed (while processing) of 200 mm/sec (millimeters per second), and that the laser is designed to have an optimum PRF of 50 kHz (kilohertz). In that case, the system can operate at both the optimum PRF and the maximum motion stage speed. As another example, assume that the laser instead has an optimum PRF of 60 kHz. In this case, pulsing the laser at that rate on the links sequentially would require that the motion stage move at 240 mm/sec, which is faster than it is capable. A simple solution to this problem is to block every other laser pulse and to slow down the motion stage by a factor of two. The main drawback of that solution is that it significantly decreases throughput (e.g., link run velocity reduced to 120 mm/sec in this case). Thus, operation of a laser with a higher PRF can, ironically, slow down the system.
Altering the PRF directly can be disadvantageous, as lasers are often optimized for a particular PRF value. More specifically, the pulse characteristics can vary considerably with changes in the PRF as the charge time of the laser is altered. That is problematic because typical link processing scenarios require fairly consistent laser pulse characteristics from link to link. In other words, the so-called “processing window” for reliably severing links is a small window that is sensitive to pulse characteristics. Characteristics that may change as the PRF of a laser is changed include pulse characteristics such as temporal shape, rise time, width, height, energy, energy stability, and beam propagation characteristics such as beam waist position, beam waist diameter, and M2 value.
U.S. Pat. No. 6,172,325, assigned to the assignee of the present invention and incorporated in its entirety herein by reference, describes laser pulse-on-position technology with a fixed laser PRF. Pulse-on-position technology is desirable because it provides very accurate placement of link blows; however, that patent does not discuss varying laser PRF.
U.S. Pat. No. 6,339,604, which is also incorporated herein by reference, describes operating a laser with a fixed, predetermined charge time to stabilize pulse properties for the purpose of trimming components on a semiconductor IC. Use of a predetermined time is not possible when using the pulse-on-position approach.